1T-SRAM combines the high capacity and low power of embedded DRAM (eDRAM) with the performance and ease of use of traditional (6T) SRAM.

MoSys’ patented 1T-SRAM memory technology is based on a dynamic bit cell, which uses a single transistor and capacitor achieving a considerable size and soft error immunity advantage over six-transistor SRAMs (6T-SRAMs) and other conventional SRAM cells. MoSys surrounds the array of bit cells with architectural and circuit innovations to create an optimized, high-performance memory core for the Bandwidth Engine family of ICs.

Advantages of MoSys’ 1T-SRAM Technology in the Bandwidth Engine:

  • High Density – up to 3X smaller silicon area than 6T SRAM
  • Low Power Consumption – Up to 50% lower than 6T SRAM
  • Ease of Manufacture – Standard logic process
  • Ease of Use – Simple, standard SRAM interface
  • High Speed – SRAM performance, Low latency random access
  • High Reliability – Dramatically reduced SER ( < 10 FIT/Mbit)