GigaChip® Interface

Bandwidth Engine SerDes supports the 90% efficient GigaChip® Interface protocol to enable high-bandwidth, high-efficiency chip-to-chip communications.

High-Speed I/O

Transmit and receiver circuitry capable of up to 28 Gbps data rate. Support of IEEE 10, 40 and 100G standards and support of OIF 11, 25 and 28G standards.

High-Density Memory

The Bandwidth Engine family of ICs utilizes MoSys’ patented 1T-SRAM embedded memory technology to achieve an unparalleled combination of performance, density, reliability, low power and cost.

Bit Safe® Self Test & Repair

MoSys’ Bit Safe Self-Test & Self-Repair is part of the intelligent error management architecture which enhances the quality and reliability for carrier and enterprise class networking equipment.