This kit includes a MoSys Bandwidth Engine evaluation board that is designed to interface to an FPGA development board through the standard Interlaken channel layout. This board has 16 SerDes lanes, eight through each channel, and uses standard reference FCI AirMax connectors for each channel. Using this kit, the MSR576TE8888 device, with its 16 lane 10.3125 Gbps GigaChip™ Interface, can be operated at full speed with a suitable host FPGA development kit.
Reference material is available upon request to to help you with your design process.
To request a FPGA Companion Kit or get the latest update and access to the information available, please contact your local sales representative at http://www.mosys.com/contact.php.