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Bandwidth Engine
BE-3 Architecture
Bandwidth Engine Products
Bandwidth Engine Performance
Technical Support
Product Brief & White Papers
Target Applications
Interoperability Demos
LineSpeed 100G PHYs
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Bandwidth Engine

Breaking Network Performance Barriers for 100G Systems and Beyond
 

MoSys’ Bandwidth Engine® Family of ICs is a memory solution with serial interfaces and intelligent offload for high performance networking equipment. Bandwidth Engine is optimized for memory transaction performance, capable of up to 4.5 billion transactions per second, up to 400 Gbps effective data t throughput, and up to 12 billion operations per second when utilizing the counting and metering fixed macro operations. Bandwidth Engine Scalable Architecture

The device architecture relies on three elements:

  • A 576Mb multi-banked and multi-partitioned memory array built with high density 1T-SRAM® memory core and delivering the highest single chip transaction rate of any memory device in production today.
  • Onboard ALUs for the acceleration of common statistics and metering functions for networking applications.
  • Sixteen lanes of low latency SerDes, compatible with CEI-11G, supporting full duplex, concurrent operations with a packetized, 90% efficient GigaChip™ Interface transport protocol.

Download Product Brief 

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Bandwidth Engine Products

Product Name Part Number White Paper Product Brief
Bandwidth Engine IC MSR576 Bandwidth Engine Serial Memory Chip Breaks 2 Billion Accesses / sec, Hot Chips 23
Bandwidth Engine 2 – Burst MSR620 Networking Memories for Buffering Applications
Bandwidth Engine 2 – Access MSR720 Networking Memories: High Access Rates for Packet-Header Processing
Bandwidth Engine 2 – Macro MSR820 Networking Memories: Intelligence for 400G App Acceleration and Host Offload

Bandwidth Engine Performance

  • Bandwidth Engine provides 8x the density and up to 2x the performance at significantly lower power than traditional QDR SRAM devices.
  • Bandwidth Engine has the highest bandwidth capability of any single chip networking memory device.
  • Bandwidth Engine is engineered and built for high-reliability carrier class and enterprise applications.

         

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Technical Support

MoSys offers a library of technical collateral to assist in the design of your system:

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Product Briefs & White Papers

Click here to access MoSys documentation

Target Applications

Bandwidth Engine was engineered to address the quality and reliability requirements of enterprise and carrier class systems. It enables next generation network performance and interconnectedness. Bandwidth Engine is well suited for the following applications:

Application Bandwidth Engine (BE) Advantage
Metering, Counters & Statistics Intelligent offload through fixed macro functions with the MSR820
Traffic Management, Table Lookup, Queuing & Scheduling Highest single chip random read performance with all BE-2 devices
State Memory Highest Single chip random dual port performance with the MSR720
Power Efficient Buffering Highest performance, single chip 400 Gbps effective data throughput with MSR620

Interoperability Demos

MoSys has demonstrated interoperability with world class FPGA and ASIC providers. Visit MoSys’ video library or MoSys’ official YouTube channel to view our demos and more.

Click here for a list of available Bandwidth Engine collateral