The MoSys MSRZ30 is a member of the Bandwith Engine 3 family optimized for the EZchip NPS-400 network processor. It had 1152 Mb of 1T-SRAM memory and on-board access scheduling.

The SerDes interface delivers full duplex, CRC protected data throughput and the memory array architecture is capable of up to three billion random memory reads per second.


  • 1152 Mb 1T-SRAM memory architecture
    • 3.2 ns core cycle time
  • Up to three billion random reads per second
  • Low Latency SerDes technology
    • 8 or 16 serial transceivers (TX/RX)
    • OIF CEI-11G-SR compatible
    • Tune for low-power transmission up to 20 cm
  • Open GigaChip Interface delivers bandwidth, efficiency and reliability
    • Low latency protocol
    • Reliability with scrambling, CRC and error recovery mechanism
  • Intelligent Error Management & Bit Safe Technology
  • High reliability- 1T-SRAM soft error immunity
  • Advanced debugging and evaluation capabilities with MoSys IC Spotlight software

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