This kit includes an evaluation board for the second generation Bandwidth Engine family in a 19×19 FCBGA package and supports data rates up to 12.5Gbps. The board can be used stand alone to interface to MoSys Bandwidth Engine 2 devices using SPI or JTAG. The card can be used with all three versions of the Bandwidth Engine 2 family, MSR620 or MSR820.
The Extended FMC Development Kit is designed to interface to an FPGA development board through the standard, single, high pin count (HPC) FMC configuration such as the Altera Stratix V Advanced Systems Development Kit or the Xilinx Virtex-7 VC707 Evaluation Kit. This board has 16 SerDes lanes, ten to the standard pin-out of the HPC connector and an additional six to the extended pin out defined by MoSys.
The extended pin out re-purposes some of the low speed HA and HB pins to allow for these additional high speed SerDes signals. The result is a board which is 100% compatible with the HPC standard FMC connector definition and operates with eight lanes to the Bandwidth Engine when connected to a standard HPC header. Carrier boards with the extended pin out support will be available in the near future. Please inquire with MoSys or with FPGA manufacturers regarding support for the Extended or Dual FMC cards from MoSys.
Reference material is available upon request to to help you with your design process. To request a Bandwidth Engine Extended FMC Development Kit or get the latest update and access to the information available, please