The Compact FMC Development Kit enables a complete, self contained and robust interconnect solution for evaluation and engineering development with the second generation Bandwidth Engine IC family and supports data rates up to 12.5Gbps. The evaluation kit also includes MoSys IC Spotlight software for SerDes link configuration and debug as well as FPGA host controller RTL code as a reference design to study and reuse.
This Compact FMC evaluation board is compliant with the mechanical form factor of the FMC standard which enables it to be used on a standard carrier card and is suitable for add-on, prototyping and fast time-to-market production deployment. The board can also be used as a standalone platform to interface to MoSys MSR620 or MSR820 Bandwidth Engine 2 devices using SPI or JTAG.
The Compact FMC Development Kit is designed to be compatible with high pin count (HPC) FMC configuration such as the Altera Arria 10 SoC Development Kit or the Virtex® UltraScaleTM FPGA VCU108 Evaluation Kit. These carrier cards have 10 SerDes lanes to the standard pin-out of the HPC connector. The MoSys C-FMC also supports an LPC+ FMC pinout which assigns a total of 16 transceivers to the LPC pin out. The result is a board which is 100% compatible with carriers supporting both HPC and LPC+ pin outs. The evaluation kit operates with eight lanes to the Bandwidth Engine when connected to a standard HPC header. Carrier boards with the LPC+ pin out support are available now. One of the boards supporting the LPC+ pin out is the Arria 10 GX FPGA Development Kit. Please inquire with MoSys or with FPGA manufacturers regarding support for the Compact, Extended or Dual FMC cards from MoSys.
To request a Bandwidth Engine Extended FMC Development Kit or get the latest update and the information available, please