This person will be responsible for the implementation of embedded SRAM and Register Files for the next generation Bandwidth Engine. Will interface with logic/architecture, physical design and layout teams; and implement high speed, low power and area efficient embedded SRAM and Register File macros for multi-core processor engines.
Design/implement custom high performance, low power and area efficient memory macros; SRAMs, Dual-Ports and Multi-Ports Register Files according to logic/architecture teams spec.
Perform floor planning and layout guidance/supervision.
Work closely with physical design/integration team for seamless chip level integration.
Circuit simulation, layout extraction, timing /power characterization and timing model generation.
Implement robust circuit technique to ensure high quality and high yielding silicon.
Perform noise, EM/IR analysis and macro functional verification.
BS. in Electrical Engineering, MSEE preferred.
5+ years of related experience which involve robust dynamic circuit design implementation.
Experience with high performance low power circuit design techniques.
Experience with Cadence and Synopsys Circuit and layout tools.
Prior hands-on design experience with SRAMs or Register File based macros required.
Basic programming skills (preferably Python or Perl) for design optimization and verification
The Firmware/Software engineer will be responsible for developing firmware and software package for driving FPGA-based silicon validating system for MoSys Serdes and Memory products. He/She will work with application groups to develop and maintain codes ranging from low-level drivers to high level GUI for customer demo boards and system applications. This person will also develop a flow-based GUI for in-house tester to achieve maximum engineering and manufacturing efficiency.
Develop serial communication drivers for USB to SPI, I2C, JTAG and MDIO.
Develop GUI on Linux/Windows for customers to evaluate MoSys Serdes/Memory products.
Create GUI to execute flow based test software to facilitate silicon bring up and data collection.
Create a software platform to bridge the gap between pre-silicon verification and post-silicon validation.
Create C compiler to support internal and external customers to program MoSys next generation Bandwidth Engine products.
Develop/maintain software for lab instrument automation and test hardware control.
MSEE with 2 years or BSEE with 4 years of related work experience.
Proven skills in C/C++ programming and familiar with object-oriented programming methodology.
Demonstrated GUI design experiences.
Familiar with assembly language is desired. Familiar with Lex and Yacc (Flex and Bison) is a plus.
Familiar with Python. Knowledge of other scripting languages is a plus.
Understand SPI, I2C, JTAG, GPIB and MDIO protocol and low level drivers.
Knowledge of hardware, digital design and design verification is desired.
Experience with FPGA and Xilinx or Altera design tools is a plus.
We are currently seeking a Global Circuit Designer to be responsible for various top level and digital circuit implementations. These include items such as global power and clock distribution, customized logic gate implementation, I/O integration, and ESD. In addition, the GCD will be the primary interface between the integration team and the various internal and external library developers for timing, power, and clock interface issues.
This position is on the Bandwidth Engine design team. The Bandwidth Engine products from MoSys, Inc. are memory dominated devices with ALUs and low-latency, high-bandwidth SerDes interfaces. This family of ICs is optimized for high-bandwidth, high-access-rate applications such as networking, storage and video.
This person will work on the logic design of the Bandwidth Engine SoC. He/She will develop and implement microarchitectures of various features on the next generation high-speed serial memory chip. Excellent logic design skills and experience with developing RTL that meets functionality, timing and power constraints is needed. Background in processor logic design or complex ASICs is required, with excellent knowledge of Verilog and synthesis tools.
BS or MS in EE and 5 years of relevant industry experience
Excellent experience with development and implementation of complex microarchitecures and RTL design.
Experience in Verilog and PERL
Experience in synthesis tools like Design Compiler
Excellent team player, innovative and self-driven with good communication skills including documentation.
MoSys is currently seeking a self-motivated hands-on validation engineer. This person will lead the validation of high-speed (up to 28 Gbps) PHY ICs. We are looking for a star performer that is able to take on a growing number of new products at MoSys.
BS degree plus at least 5 years’ experience with mixed-signal IC validation
Strong background in software and software control of lab equipment (C++, Perl, Python, CVI / LabWindows etc.)
Hands on experience with multi-lane multi-standard SERDES testing, measurement of the key performance parameters and the ability to define, develop and execute both test platforms and validation plans for new products.
Preferably skilled in high speed (>10 Gbps) signal integrity measurements and de-embedding techniques
Experience in test / data acquisition automation and concise presentation of measurement results. Ability to summarize the observed data and recommend plan of actions.
Detailed, working knowledge of lab equipment (Oscilloscopes, Function Generators, Spectrum Analyzers, BERTs, etc, automated control of equipment using the GPIB/488 bus ) and lab validation techniques
Experience in Unix/Linux/Windows environment and shell scripting
Validation plan, schedule, dependencies and test setup development skills
Good system level debugging / troubleshooting skills
Test board and interface design skills
Effective communication and presentation skills
Ability to work within an international, cross functional team.
Ability to prepare for and perform post-silicon validation
Click here to apply for the Staff Engineer, Validation, Post Silicon (Santa Clara, CA) position!
MoSys is seeking a Sr. Analog Circuit Design Engineer to be responsible for the design and implementation of memory IP voltage regulator and charge pump for next generation Bandwidth Engine products. Will interface with product/test, physical design and layout teams; to implement low power and area/power efficient voltage regulators used in the embedded DRAM macro.
Design/implement low power and high efficiency internal voltage generator & charge pump circuit design for memory eDRAM
Perform circuit modeling, AC/DC/Transient simulation, characterization, and documentation
Perform layout guidance/supervision, layout extraction and post layout simulation
Perform noise, EM/IR analysis
Work closely with product engineers for optimum product bring-up and silicon debug
BS in Electrical Engineering, MS preferred plus 3-5 years experience
Solid understanding of transistor/device operation
Hands on BGR/Comparator/Charge-pump design experience required
Experience with Cadence and Synopsys Circuit and layout tools
Prior experience with embedded DRAM (or familiar w/ DRAM operation) preferred
Basic programming skills (preferably Python or Perl) for design optimization and verification
MoSys offers 6 month internship positions for engineering students at the graduate levels, and provides an exciting, real-world opportunity to gain valuable, hands-on experience, giving you the chance to put your education into action.
MoSys interns are not brought on to perform side projects or mundane tasks. Rather, our interns participate in critical, high-profile projects that directly shape MoSys as an evolving and innovative company. If you are up for a challenge, an internship with MoSys may be what you are looking for.
Interns are considered valuable members of the MoSys team and therefore may earn many of the benefits available to full-time employees, including:
Real-world experience with leading-edge technologies
Networking with and mentoring by experienced MoSys managers and team members
Consideration for full-time employment when you graduate based on internship performance
Intern Positions are available in one or more of the following fields:
High speed circuit design and verification
Logic design and verification
FPGA implementation and bringup
Parallel tester software development
Memory and SerDes characterization
ESD and latchup analysis
Design for Test implementation
PCB board design for test and characterization
Signal and Power Integrity analysis for 10-28 Gbps serial links
MoSys is looking for fast learners who are currently enrolled in Master's, or doctorate programs in the field of Electrical Engineering. Candidates should have a grade point average of 3.5 or higher on a 4.0 scale. An ideal candidate will also possess exceptional written and spoken communication skills, excellent interpersonal skills, previous internship or work experience, proven leadership skills and a positive attitude toward working on and building teams. Versatility and the flexibility to adapt to new situations are essential.
The MoSys Engineering Rotation Program offers select graduates the opportunity to work closely with our talented engineers on critical projects and have an immediate impact in the company.
The MoSys Engineering Rotation Program is a full-time 12-month technical development program. The Engineering Rotation Program gives participants an opportunity to experience several different rotational assignments before assuming a full-time regular position in the company. Engineers in the program complete three assignments during four month long high-profile placements across the corporation. Each assignment is challenging, designed to provide the Engineer with a unique experience and contributes to the company’s goals and objectives.
Final employment placement is determined by candidate interest as well as company need.
PhD or MS in Electrical Engineering
Strong technical knowledge and an ability to adapt quickly to new projects
Excellent written/verbal communication skills and the ability to work well in a team environment