Third Generation Bandwidth Engine MSRZ30, MSR630 and MSR830 Devices Support a Serial Interface up to 30G per lane, 1Gb of Memory and Increased Offload Intelligence to Deliver Scalable Performance and Features
MoSys® Bandwidth Engine ICs support the flexible high-performance serial GigaChip® Interface with scalable lane support (2, 4, 8, or 16) and scalable SerDes per lane rates of 10-15G or 20-30G. The scalable interface allows trade-offs of pins and bandwidth for different types of applications. The internal Bandwidth Engine 3 architecture consists of a highly parallel memory array with thirty-two access ports which are managed by the array manager and connected to the high performance, reliable, GCI serial interface enabling the highest throughput and minimizing resource conflict. The abundance of memory resources aligns well with multi-threaded, many-core processor implementations which require unprecedented levels of memory transaction rate and bandwidth. The MSR830 device supports additional statistics, metering and atomic operations for packet processing offload and maximum efficiency of pin count and memory bandwidth. These monolithic devices deliver extreme memory and offload performance without requiring exotic packaging with ultra-dense interconnect or complex cooling solutions associated with multi-chip modules.
The MoSys Bandwidth Engine 3 Family
All three third generation Bandwidth Engine devices have a common footprint in a 27mm x 27mm 676 pin FCBGA package with 1mm pitch.
"Solutions for the memory bandwidth bottleneck are critical to provide
scalable performance and features to equipment throughout the network,"
For information about product availability and pricing, contact a local
This press release may contain "forward-looking statements" about MoSys, including, without limitation, anticipated Bandwidth Engine product development. Forward-looking statements are based on certain assumptions and expectations of future events that are subject to risks and uncertainties. Such statements are made in reliance upon the safe harbor provisions of Section 27A of the Securities Act of 1933 and Section 21E of the Securities Exchange Act of 1934. Actual results and trends may differ materially from historical results or those projected in any such forward-looking statements depending on a variety of factors. These factors include, but are not limited to, the timing of customer orders and product shipments, our ability to enhance our existing proprietary technologies and develop new technologies, achieving necessary acceptance and adoption of our IC architecture and interface protocols by potential customers and their suppliers, difficulties and delays in the development, production, testing and marketing of our ICs, reliance on our manufacturing partners to assist successfully with the fabrication of our ICs, availability of quantities of ICs supplied by our manufacturing partners at a competitive cost, level of intellectual property protection provided by our patents, the expenses and other consequences of litigation, including intellectual property infringement litigation, to which we may be or may become a party from time to time, vigor and growth of markets served by our customers and our operations, and other risks identified in MoSys' most recent reports on forms 10-Q and 10-K filed with the Securities and Exchange Commission, as well as other reports that MoSys files from time to time with the Securities and Exchange Commission. MoSys undertakes no obligation to update publicly any forward-looking statement for any reason, except as required by law, even as new information becomes available or other events occur in the future.
Bandwidth Engine, GigaChip, and