MoSys Sponsors Linley Tech High-Speed Interconnects Seminar


MoSys Vice President, Michael Miller, to Present

SANTA CLARA, Calif., Nov 02, 2010 (BUSINESS WIRE) -- MoSys, Inc. (NASDAQ: MOSY):

Who:

MoSys (NASDAQ: MOSY), a leading architect of serial chip-to-chip communications solutions that deliver unparalleled bandwidth performance for next generation networking systems and advanced system-on-chip (SoC) designs, is sponsoring The Linley Tech High-Speed Interconnects Seminar. Michael Miller, Vice President of Technology Innovation and System Applications at MoSys, will be presenting on "Bandwidth Density Challenges Beyond 100 Gbps" during Session 2: System Interconnects.

What:

The Linley Tech High-Speed Interconnects Seminar will include leading companies discussing the latest products and technologies for system-level interconnects and recent developments at the physical layer for various protocols. This one-day technical event will cover interconnect technologies, developing standards and technology trends.

The conference is intended for OEM/ODMs, board developers, software developers, press and the financial community. To register: http://linleygroup.com/Seminars/hsi_registration.html

Information about the conference will be streamed on Twitter from @linleygroup, as well as from conference attendees and presenters, with the hashtag #linleytech.

When:

Wednesday, November 3, 2010 beginning at 9 a.m. A reception at 4:15 p.m. immediately follows the Seminar.

Where:

Doubletree Hotel San Jose

2050 Gateway Place

San Jose, CA 95110

About MoSys, Inc.

MoSys, Inc. (NASDAQ: MOSY) is a leading architect of serial chip-to-chip communications solutions that deliver unparalleled bandwidth performance for next generation networking systems and advanced system-on-chip (SoC) designs. MoSys' Bandwidth Engine(TM) family of ICs combines the company's patented 1T-SRAM(R) high-density memory technology with its high-speed 10 Gigabits per second (Gbps) SerDes interface (I/O) technology. A key element of Bandwidth Engine technology is the GigaChip(TM) Interface, an open, CEI-11 compatible interface developed to enable highly efficient serial chip-to-chip communications. MoSys' IP portfolio includes SerDes IP and DDR3 PHYs that support data rates from 1 - 11 Gbps across a variety of standards. In addition, MoSys offers its flagship, patented 1T-SRAM and 1T-Flash(R) memory cores, which provide a combination of high-density, low power consumption, high-speed and low cost advantages for high-performance networking, computing, storage and consumer/graphics applications. MoSys IP is production-proven and has shipped in more than 325 million devices. MoSys is headquartered in Santa Clara, California. More information is available on MoSys' website at http://www.mosys.com.

MoSys, 1T-SRAM and 1T-Flash are registered trademarks of MoSys, Inc. The MoSys logo, Bandwidth Engine and GigaChip are trademarks of MoSys, Inc. All other marks mentioned herein are the intellectual property of their respective owners.

SOURCE: MoSys, Inc.

Media Contact:
Shelton Group
Katie Olivier, 972-239-5119, x128
kolivier@sheltongroup.com
or
Corporate Contact:
MoSys, Inc.
Kristine Perham, 408-418-7670
kperham@mosys.com